Bridging the gap from manufacturing to design data.

With LayDis we are paving the way for seamless integration from chip design through the mask making process up to the workbench of teams which are typically located in

• product engineering
• failure analysis
• yield enhancement.

Merging microscopy, chip design and layout based analysis is one of today's key challenges in the semiconductor product teams on their way towards more productivity and higher efficiency. Instant and fast access to IC construction data is a must requirement.

LayDis goes beyond the common task of viewing IC layout data. Beside the viewing layout files of integrated circuits, LayDis offers a additional range of applications like high resolution printing and plotting, finding electrical connections, image overlays with microscope images.

With optional inter process computer links, LayDis enables direct interface to drive and communicate with analytical equipment (Optical-, Focused Ion Beam-, Scanning Electron-, Photon Emission-, Atomic Force- Microscopes).